Mobile products (e.g., mobile phones, smart phones, tablet computers, etc.) are very restricted in available space because there are typically severe limitations for chip/package area and height (among other physical and electrical parameters). Therefore, it is extremely important to reduce the size of electronic components (e.g., packaged chips or discrete devices, integrated passive devices (IPDs), surface mount devices (SMDs), etc.) on a system board (e.g., printed circuit board PCB).
Conventional stacked electronic components typically require relatively large z-height making them more difficult to fit inside a housing of mobile products, especially when several chips, IPDs or SMDs need to be assembled and/or stacked one on top of another. In addition, as with most electronic components, there is usually the goal of increased electrical performance.
There are two existing packaging methods for high die count stacked die packages. One method forms a wire bond based package in which substrate and over mold add extra z-height to the package. In addition, wire bond based package are also typically limited in their performance because of the number and length of the wires that are utilized in the packages.
Another existing packaging method for high die count stacked die packages utilizes Thru Silicon Via (TSV) technology. High die count stacked die packages that utilize TSV usually have relatively high speed. However, z-height reduction is still difficult with TSV. In addition, the vias that are formed using TSV technology often use up valuable space on silicon. There are also usually relatively high manufacturing costs that are associated with utilizing TSV technology making it more expensive to produce high die count stacked die packages using TSV technology. The typical z-height of a conventional 16 Die BGA stacked die package is 1.35 mm where each die is thinned to 35 um.